1. Field of the Invention
The present invention relates to a buffer storage system using a page designating address and intra-page address. The system according to the present invention is concerned with a combination of a buffer storage and a tag storage, and a conversion between logical and real (physical) addresses in connection with a virtual storage system.
2. Description of the Related Art
In the prior art, a page in a main storage is designated, for example, by the upper 19 bits of, for example, a 31 bit logical address, and a displacement in the designated page in the main storage is represented, for example, by the lower 12 bits of the 31 bit logical address. These upper 19 bits of the logical address are referred to as a page designating address, and the lower 12 bits of the logical address are referred to as an intra-page address.
In the prior art, an address input to a buffer storage and a tag storage is an address comprising, for example, the lowest single bit of the page designating address and a plurality of bits of the intra-page address. Accordingly, the capacity of the buffer storage attains, for example, an 8K byte capacity which corresponds to 2 pages.
In the prior art, however, it is possible that invalid data corresponding to data in a page from which the data should have been replaced remains in the buffer storage, and that this invalid data is read in response to a read request from a processor. This constitutes a problem in the prior art.